1. Field of the Invention
The present invention generally relates to a semiconductor integrated circuit, more particularly, to the semiconductor integrated circuit having a read register and a write register. Such registers are employed in a FIFO (First In First Out) memory and in a VRAM (Video Random Access Memory).
This application is a counterpart of Japanese patent applications, Serial Number 0118758/1998, filed Apr. 28, 1998 and Serial Number 0203441/1998, filed Jul. 17, 1998, the subject matter of which are incorporated herein by reference.
2. Description of the Related Art
A conventional technique is described in Japanese Laid Open Patent Application No. 07-65569. This patent application discloses a semiconductor integrated circuit having a read register and a write register, each of the registers being comprised of two inverters. A data stored in the write register is transferred to the read register through a transmission gate.
However, the patent application does not describe the relationship between the drive capacity of the inverter in the read register and the drive capacity of the inverter in the write register. If the drive capacity of the inverter in the read register is larger than that of the inverter in the write register, there is a possibility that the data transferred from the write register is inverted by the read register. Consequently, there has been a need for an improved semiconductor integrated circuit.